Hiring EDA rock-stars to shape the next generation of Xilinx FPGA Architecture. As part of Xilinx FPGA Architecture evaluation group, the person needs to muddle in various complex EDA problems in FPGA synthesis, placement and routing space. This position requires person to get an in-depth understanding of Xilinx FPGAs and work through placement, router algorithms for evaluating impact of new architecture features. You get to work on solutions of problems bordering EDA and hardware domain.
Years of relevant experience: B.Tech+ 6 to 11 Yrs
C++ / C
Algorithms and data Structures
Experience in PnR or Synthesis or STA EDA tool development (FPGA / ASICs)
Scripting preferably Python (or Perl) and tcl
Basic Verilog / Vhdl coding
Basic timing concepts
Design debug (timing , QoR)
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